With support for writing by CD drives and DVD drives, there is increasing demand for many operation modes corresponding to reading and writing operations, with respect to a photo-detecting amplifier circuit of the optical pickup. For example, for a small signal upon reading and a large signal upon writing, the photo-detecting amplifier requires gain switching between two levels. Further, in addition to two conventional modes for the gain switching, one more mode is required for the followings: support for recording media of different reflectivities in DVD drives and the like, and standby function for lower power consumption in portable devices, for example.
Meanwhile, for the photo-detecting amplifier circuit mounted on an integrated circuit, an external input terminal and a chip area are closely related to each other. More specifically, if a terminal is arranged outside, a wire bonding area is required on a chip for the connection to a frame of a package. The wire bonding area is about 150 μm per side, depending on equipment for bonding and a manufacturing process for semiconductors. In contrast, one transistor area is about 20 μm per side, and the size of the wire bonding area is therefore fifty or more times than that of the transistor area. Further, the width of a terminal wired on the chip is about several micrometers. Thus, decrease of a terminal arranged outside brings about a dramatic effect on size reduction of a chip.
For the realization of switching among three or more operation modes, a photo-detecting amplifier circuit achieving size reduction of a chip by means of a decoder circuit is suggested. In this case, only one input signal is required, although two or more input signals are required in the conventional art, and size reduction of a chip is realized by using a decoder circuit which decodes an input voltage supplied to a single external input terminal into three or more control outputs.
FIG. 7 is a block diagram showing an electrical arrangement of a typical decoder circuit 1 of the conventional art. The decoder circuit 1 includes two comparators A1 and A2 and reference voltage sources B1 and B2 respectively corresponding to the comparators A1 and A2. An input voltage Vin which is provided to a single external input terminal 2 is supplied to respective positive input terminals of the two comparators A1 and A2. To respective negative input terminals of the comparators A1 and A2, reference voltages E1 and E2 are supplied from the reference voltage sources B1 and B2. When the input voltage Vin is more than the reference voltages E1 and E2, the comparators A1 and A2 produce high-level output voltages Vo1 and Vo2, respectively. On the other hand, when the input voltage Vin is less than the reference voltages E1 and E2, the comparators A1 and A2 produce low-level output voltages Vo1 and Vo2, respectively.
This arrangement realizes a window comparator for determining the following three states: Vin>E1, E1>Vin>E2, and Vin<E2, where the two reference voltages E1 and E2 are threshold voltages, and it is E1>E2. By carrying out an operation in accordance with two outputs Vo1 and Vo2, it is possible to detect three states. For example, gain switching for a photo-detecting amplifier is performed using the first control output Vo1, and control for on/off of the standby function of the photo-detecting amplifier is performed using the second control output Vo2.
FIG. 8 is an electrical diagram showing an example of the arrangement of the comparators A1 and A2. These comparators A1 and A2 include N-type transistors q1 and q2, P-type transistors q3 and q4, and a constant current source f. In the transistors q1 and q2, their emitters are grounded via the constant current source f, their bases are respectively positive and negative input terminals, and their collectors are connected to a power source line of high level Vcc via the transistors q3 and q4 which is active load. With this arrangement, a contact of the collectors of the transistors q2 and q4 becomes an output terminal, and when the input voltage Vin is more than the reference voltages E1 and E2, the comparators A1 and A2 produce high-level output voltages Vo1 and Vo2, respectively. On the other hand, when the input voltage Vin is less than the reference voltages E1 and E2, the comparators A1 and A2 produce low-level output voltages Vo1 and Vo2, respectively.
As other conventional art, Japanese Laid-Open Patent Application No. 2000-236251 (Tokukai 2000-236251; published on Aug. 29, 2000) discloses that using a differential couple and a constant current source, three different current values are outputted from a single output terminal with respect to three inputs supplied to a single external input terminal. Japanese Utility Model Publication No. 2-6684/1990 (Jitsukouhei 2-6684; published on Feb. 19, 1990) discloses that one transistor of the transistors making up a differential couple in a first differential amplifier is provided with a second differential amplifier, thereby realizing one input and three outputs with one constant current source and realizing lower-power consumption.
As described above, the conventional circuit configuration requires two external input terminals or two comparators (differential amplifier), which arises the problem of difficulty in size reduction of a chip.